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Sébastien Pillement Research

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Research activities

Abstract of my activities

The research that I address focuses on the design of dynamically reconfigurable systems. Constant evolution of applications and the ever-increasing need for performances require the development of new efficient and flexible architectures. These constraints have led to more complex architectures, their reconfiguration mechanisms and management.

Low-Power and reliable dynamically reconfigurable architecture

In this theme we intend to define new embedded architectures. In the first part of my work, we propose architectures providing a good compromise between performance, power consumption, and flexibility. My research addressed the issue of creating a flexible platform with the greatest efficiency possible.The modern SoCs include a large number of heterogeneous features, and face problems due to technology shrink. The main issue of this axis is the need to develop fault-tolerant systems. This property needs to be adressed at the architectural level by defining new structure but also by providing reliable interconnection infrastructures (such as Network-on-Chip). We are studying new coding and new technologies to reduce consumption of interconnect while improving their reliability. We are also working to define flexible networks adapted to the dynamic reconfiguration paradigm.

Methods and system management

In this axis, I am working on the development of tools and methods suitable for reconfigurable embedded systems. The emergence of reconfigurable systems requires the use of specific tools and mechanisms. In particular, the presence of a dedicated operating system becomes necessary. I am particularly interested in the definition of management services architectures including placement and task scheduling aspects inside a reconfigurable System-on-Chip (RSoC). The establishment of specific management can develop reliable dynamically reconfigurable systems, we then propose OS services in that sense. And finally, the design framework should take into account this new optimisation constraint in order to increase the reliability of the architecture (design for reliability).

Collaborations

International Collaborations

  • University of Toronto (Canada): Pr Vaughn Betz.
  • DLR Oldenburg (Germany): Pr Kim Grüttner.
  • Polytechnique Montreal (Canada): Pr Pierre Langlois.
  • Tec de Monterey Guadalajara (Mexico): Dr. Gilberto Ochoa-Ruiz, ICA research team.
  • University of Massachusetts (USA): Reconfigurable group of Pr Russel Tessier, and the VLSI Cad group of Pr Maciej Ciesielski.
  • University of Erlangen-Nuremberg (Germany): Co-design Of Massively Parallel Embedded Processore Architectures.
  • University of Karlsruhe (Germany): Design of virtualization layer for heterogeneous many-core architectures.
  • TU Eindhoven (Netherland): Communication infrastructure and dynamic management.

National Collaborations

  • Sorbonne University, Lip6.
  • University of Bordeaux, IMS.
  • University of Angers, LARIS.
  • University of Bretagne Occidentale, Lab-STICC.
  • University of Rennes 1, IRISA.
  • University of Nantes, LS2N.
  • University Gustave Eiffel, Nantes.

Industrial Collaborations

  • Thales Research and Technologies, Palaiseau.
  • Thales DIS (formerly INVIA), Meyreuil.
  • CapGemini Engineering (formerly ALTRAN), Rennes.
  • STMicroelectronics, Le Mans.
  • CEA, Palaiseau and CEA Tech PdL.

Projects

Ongoing projects

  • 2023-2029: Adapting project from the PEPR IA
  • 2023-2027: Fitness and Hi-Sec projects from the PEPR future networks
  • 2022-2025: ANR PRCE SecV. AAPG ANR project. started in march 2022
  • 2021-2024: NOP. Cominlabs project. start in september 2021

Previous projects

  • 2020-2023: AI for a FPGA bitstream interpretation. Joint call UToronto-CNRS.
  • 2018-2021: Secure ioT. attractivity RFI region project.
  • 2017-2020: Sensor Enhancement To Augmented Usage and Reliability (SENTAUR). RFI region project.
  • 2015-2019: Holistic Approach for Reliability (HoliStar) CEATech project.
  • 2015-2018: Safe and ProgrAmmable Real-Time Embedded Systems (SPARTE) RFI region project.
  • 2014-2018: Reliasic Brittany region and CominLab project. Designing reliable applications on unreliable architectures.
  • 2011-2014: FlexTiles project. European FP7 Project
  • 2011-2015: ARDyT Architecture Reconfigurable Dynamiquement Tolérante aux fautes. ANR INS (Ingénierie Numérique et Sécurité) Project
  • 2010-2012: ARF project Architecture Reconfigurable Fiable. Défis scientifiques émergents de l'Université de Rennes 1
  • 2008-2011: FosFor (Flexible Operating System FOr Reconfigurable platform) ANR ARFU (Architectures du Futur) Project
  • 2008-2011: CIFAER (Communications Intra-véhicule et Architecture Embarquée Reconfigurable) ANR ARFU (Architectures du Futur) Project

Students

Current Ph.D. students

  • Mustafa Ibrahim (2024-2027): Flexible ultra low power architecture supporting different artificial intelligence algorithms in the Internet of Things context , In collaboration with LiP6, France Téo Bitton (2023-2026): Anomalies detection at run-time in Open-hardware , In collaboration with Thales TRT, France
  • Mohamed Amine Zhiri (2022-2025): Self-adaptive and reliable interconnect network for AI accelerator architectures , In collaboration with CEA, France
  • Juliette Pottier (2022-2025): µ-architectural protection of a RISC-V open-hardware processor

Ph.D. Graduates

Post-doc

  • Antoine Bernabeu (2024-2025): Etude d'algorithmes de prédiction de récupération d'énergie pour les systèmes de calcul intermittent.
    Projet NOP.
  • Théo Serru (2025): Impact sur la sécurité des solutions actuelles pour répondre aux exigences de fiabilité.
    Projet NF-HiSec.

Focus

A comprehensive presentation of our research activities for the design of reliable and reconfigurable architectures is here