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Professor in Computer Engineering, Evolving within the ASIC research team (IETR Lab)

News

  • The team has available positions for Engineer/master students. More information here.
  • Welcome to Laureline Dubucq who start a PhD, in collaboration with STMicroelectronics Le Mans.
  • Welcome to Mustafa Ibrahim who start a PhD in the framework of the ADAPTING project, in collaboration with INL, IRISA, Lip6, CEA, Lab-STICC.
  • The paper "Call Rewinding: Efficient Backward Edge Protection" accepted in TCHES is online and will be presented next year at the conference.
  • The paper "A Study in Specification and Hardware Runtime Verification of Critical Embedded Software" accepted in IEEE TDSC is online.
  • The paper "Runtime task scheduling for FPGA-based embedded systems using just-in-time bitstream prefetching" accepted in ACCESS is online.
  • Ph.D. thesis of Quentin Dariol "Early Timing and Energy Prediction and Optimization of Artificial Neural Networks on Multi-Core Platforms" is online.

Topics of interests

My research activities focus on the design and the management of Dynamically Reconfigurable Architectures (DRA). More precisely I investigate the following areas:
  • New approaches in dynamically reconfigurable architecture (HW and SW point of view),
  • Design of efficient and flexible interconnections,
  • Dedicated embedded operating system for DRA,
  • Fault-tolerant systems and reliability in embedded systems.
  • Hardware security in embedded systems.

Available Positions (Master, PhD, Post-doc, and Engineer)

If you are interested in any of these positions, or if you want more information, please contact me by email.

Post-doctoral position:

PhD:

Master position:

Engineer internship:

Where and how to contact me

My email: Sebastien.Pillement AT univ-nantes.fr

Polytech - Nantes Université
IETR Nantes - ASIC Team
rue Christian Pauc
44000 Nantes - FRANCE
Tel : +33 (0)2-40-68-30-64
Bureau : B112

Team activities

A short presentation of our research activities can be found here .

Focus

The french embedded systems community propose a classification of top ranked publications for the SoC-SiP domain. The result can be found here

UPARC Download

The "UPaRC|Ultra-Fast Power-aware Reconfiguration Controller" VHDL code can be downloaded here.